Portland-State-University 2024-2025 Bulletin

CS 538 Computer Architecture

Processors, memory hierarchy, and bus systems. Multi-level caches and cache coherence in MP systems. Arithmetic algorithms. RISC vs. CISC instructions, pipelining, and software pipelining. Superscalar, super pipelined, and VLIW architectures. Connection networks. Performance evaluation, simulation, and analytic models. Performance enhancement through branch prediction and out-of-order execution.

Credits

3
  • Up one level
  • 500