Portland-State-University 2014-2015 Bulletin

ECE 674 High-level Synthesis and Design Automation

Comprehensive design automation systems. Problems of system and high-level synthesis. Register-transfer and hardware description languages. Data path design: scheduling and allocation. Design methods for systolic, pipelined, cellular and dynamic architectures. System issues. System-level silicon compilers. Group project: using high-level tools for design of a complete VLSI ASIC chip or FPGA architecture: vision, DSP, or controller. Also offered as ECE 574 and may be taken only once for credit.




Prerequisite: ECE 573/673.
  • Up one level
  • 600