Ph 446 Microelectronic Device Fabrication II

The emphasis of second part of this seroes is on metallization, dielectrics, and multilevel interconnects. Metallization issues discussed will include silicides, barrier layers, interconnects, multilevel metallization architecture, and low-k dielectrics. This is be followed by discussion of deposition and properties of various dielectric films. Epitaxial growth and properties of SOI and SiGe devices are also covered. In all these discussions, physics related to fabrication of nanoscale devices and special effects that come into play at these dimensions will be examined. Assignments will include computer simulations of device fabrication (i.e., virtual fab software). Also offered for graduate-level credit as Ph 546 and may be taken only once for credit.